DESE (formerly CEDT)

Indian Institute of Science, Bangalore

Mahesh G. V.

Principal Research Scientist, Electronics Systems Packaging Group, CEDT

Senior Member, IEEE

GVM_June2010.jpg

 

Background
  • Currently, Teaching and Research Faculty (Principal Research Scientist) at the Centre for Electronics Design and Technology (CEDT), Indian Institute of Science, Bangalore. 
  • Employed at IISc since October 1984; initially working with Inorganic and Physical Chemistry Department and then moving over to CEDT in May 1987. Activities in CEDT include teaching post-graduate students in the area of Electronics Packaging & research and carrying out development activities in the board-level packaging aspects. 
  • Awarded a Swiss Government scholarship to work at IVF, Sweden during 1994-95 on MCM-L and SBU Technology for PWBs. Worked with Dr Bill Brox (currently with Imego, Sweden.)
  • During 1999-2000, visited the Packaging Research Center, Georgia Tech, Atlanta, USA as a Visiting Faculty for 18 months to teach two unique courses called "Design-Build-Operate" (DBO 1 and DBO 2) for graduate and under-graduate students. The courses covered all major electronic systems packaging areas like Design, Fabrication, Electrical Test, Component Assembly, Reliability and Thermal management.
  • Teaming up with one of the pioneers in electronics packaging, Professor Rao R Tummala, I was involved in publishing the first-of-its-kind fundamental text book for beginners called "Fundamentals of Microsystems Packaging" published by McGraw Hill, NY. This book is currently used as a course textbook by over 50 universities globally by electronics packaging faculty.
  • Visited the NSF-ERC Microsystems Packaging Research Center, Georgia Tech, Atlanta on sabbatical leave from IISc during the period September 2004 to July 2005 to work on Embedded Passives- design, fabrication and evaluation of embedded resistors and nano-composite capacitors.

Academic Interests

 
  • PWB Design using CAD tools
  • Process technology of advanced PWBs
  • Microvias and Sequential Build-up Technology
  • Surface Mount Technology- Assembly
  • SLIM/System on Package (SOP)
  • Embedded Passives for SOP
  • Packaging Education with emphasis on hands-on training
  • Short courses and Training programs in electronics systems packaging
  • Certification programs with IPCA on important industry standards
  • Lead-free soldering and assembly issues (also training)

 

Teaching

Image2

 

 
  • "Electronics Systems Packaging”:
  • Core course in CEDT offered during August-December terms for M.Tech and M.E students;
  • 2:1 with extensive hands-on opportunities for students in PWB design and fabrication; assembly and test.
  • Term: August-December every year.

 

Syllabus

  • Electronic systems and needs
  • Physical integration of circuits, packages, boards and full electronic systems
  • System applications like computer, automobile, medical and consumer electronics with case studies
  • Packaging levels; electrical design considerations- power distribution, signal integrity and parasitics. Wireability issues
  • CAD for Printed Wiring Boards (PWBs)
  • PWB Technologies, MCMs, flexible and 3-D packages
  • Recent trends in manufacturing like microvias and sequential build-up circuits
  • Joining methods in electronics- solders and their alternates
  • Surface Mount technology and assembly; other advanced chip connection methods
  • Thermal management of PWBs, Electrical test, Thermo mechanical reliability
  • Green electronics: Lead-free and Halogen-free materials and impact
  • Hands-on training in PWB Design, Fabrication, SMD and BGA Assembly and Test

    Suggested Reading:
    1. Fundamentals of Microsystems Packaging; Ed. Rao R Tummala, McGraw Hill, NY, 2001
    2. Advanced Electronic Packaging;     Ed. William D Brown, IEEE Press, 1999

 

 

Professional Membership
  • Member, IEEE and IEEE-CPMT (since Jan 2003)
  • Senior Member, IEEE (since June 2004)
  • Life Member, IMAPS India Chapter
  • Executive Committee Member, Electronics Designers Council of India (EDCI)
  • Institutional Member, Indian Printed Circuit Association (IPCA), Bangalore
  • Technical Advisor (Honorary), IPCA-Bangalore

 

 

List of Publications

 

 

1.   Thermal reactivity of metal acetate hydrazinates, G.V.Mahesh and K.C.Patil, Thermochimica Acta, 99(1986) 153-158.

2.   Preparation, characterization and thermal analysis of rare earth and uranyl hydrazinecarboxylate derivatives, G.V.Mahesh, P.Ravindranathan and K.C.Patil, Proc. Ind. Acad. Sciences (Chem.Sci.), 97 (1986) 117-123.

3.   Low temperature preparation of fine particle cobaltites, P.Ravindranathan, G.V.Mahesh and K.C.Patil, Journal of Solid State Chem., 66 (1987) 20-26.

4.   Low temperature preparation of nickel and zinc cobaltites, G.V.Mahesh and K.C.Patil, Reactivity of Solids, 4 (1987) 117-123.

5.   Printed Circuit Board Technology- An Overview, G.V.Mahesh and G.Ananda Rao, CEDT Publication, IISc, Bangalore, 1989.

6.   Preparation of cobalt doped gamma Fe2O3 and Mn-Zn ferrites by the thermal decomposition of hydrazine precursors, G.V.Mahesh and K.C.Patil, Sixth National Symposium on Thermal Analysis, IIT Delhi, November 14-18, 1987.

7.   An esr study of Mn(2+) doped hydrazinium tris[hydrazinecarboxylate N' O'] zinc(2+) monohydrate, M.A.Gawad, G.V.Mahesh and S.V.Bhat, Hydrazine Centenary Symposium, October 26, 1987, Indian Institute of Science, Bangalore.

8.   An esr study of Mn(2+) doped hydrazinium tris[hydrazinecarboxylate N' O'] zinc(2+) monohydrate, M.A.Gawad, G.V.Mahesh, K.C.Patil and S.V.Bhat, 24th Ampere Congress, Poznan, Poland, August 29-September 3, 1988.

9.   Preparation of cobalt doped gamma Fe2O3 and Mn-Zn ferrites by the thermal decomposition of hydrazine precursors, K.Suresh, G.V.Mahesh and K.C.Patil, Journal of Thermal Analysis, 35(1989) 1137-1143

10.  Preparation of cobalt substituted gamma Fe2O3, K.Suresh, G.V.Mahesh and K.C.Patil, Fifth International Symposium on Ferrites, Bombay, January 10-13, 1989.

11.  Toxic Wastes in PCB industry-Sources and Minimization, G.V.Mahesh, Journal of the Electrochemical Society of India, 39(1990)231-238.

12.  Importance of properties of metal deposits in electronic manufacture, G.Ananda Rao and G.V.Mahesh, National Conference on Electroplating and Metal Finishing, New Delhi, November 21-23, 1990.

13.  An Electron spin resonance study of Mn2+ doped calcium hydrazine carboxylate monohydrate; M.M.Abdel Gawad, G.V.Mahesh, K.C.Patil and S.V.Bhat, Bull. Mater.Sci. Vol 17, No.6, November 1994, pp 1131-1141.

14.  An ESR study of Mn2+ doped hydrazinium tris (hydrazinecarboxylato -N -O)- zincate (II) monohydrate; M.M.Abdel Gawad, G.V.Mahesh, K.C.Patil and S.V.Bhat, Proceedings of the 10th International Conference on Hyperfine Interactions, Leuven, Belgium, August 28- September 1, 1995, pp 484-487.

15.  Issues in Packaging Technology for High Performance Computing; H.S.Jamadagni, G.V.Mahesh, G.Ananda Rao and E.S.Dwarakadasa, ADCOMP '95, Bangalore, December 20-22, 1995.

16.  Flexible Circuit Technology-An Overview; G.V.Mahesh, Katarina Boustedt and Bill Brox, IVF Report 95015, IVF Sweden Publication, 1995.

17.  Estimation of Future Technology Trends in the Electronics Industry by Statistical Treatment of Data Base Searches; Katarina Boustedt, Bill Brox, G.V.Mahesh and Tomas Segeberg, IVF Report, IVF Sweden Publication, 1995.

18.  Surface Laminar Circuits as MCM-L Interconnects- Background and Status; G.V.Mahesh, Per Carlsson, Katarina Boustedt and Bill Brox, IVF Report, IVF Sweden Publication, 1995.

19.  Emergence of MCM-L Technology; G.V.Mahesh, Paper presented at a one-day Workshop on Recent Trends in Packaging, IVF, Sweden, March 30, 1995.

20.  Developments in MCM-L Technology; G.V.Mahesh, Paper presented at a one-day Workshop on Multichip Modules, ABB, Vasteras, Sweden, May 31, 1995.

21.  Multichip Modules and SLC; G.V.Mahesh, Invited paper presented at the National Symposium on Electrochemical Science and Technology, IISc, Bangalore, July 22, 1995.

22.  Surface Laminar Circuits-An Approach to low-cost MCM-Ls; G.V.Mahesh, Invited paper at the Annual Conference of ISHM-India Chapter, IETE Building Bangalore, September 23, 1995.

23.  Reliability evaluation of a Novel Surface Laminar Circuit Process- an approach to cost-effective MCM-L, Katarina Boustedt, Bill Brox, Per Carlsson, Per Hedemalm, Mats Lindgren and G.V.Mahesh, Paper presented at the Surface Mount International (SMI) Conference held at San Jose, California, September 8-12, 1996.

24.  Surface Laminar Circuits- an approach to MCM-L realization, G.V.Mahesh, Paper presented at the EMIT‘96 International Conference held at IISc, Bangalore, February 12-16, 1996, Proceedings pp 278-284.

25.  Relation between Solderability and the properties of the Gold/Nickel interface; Per Carlsson, Zonghe Lai, Bill Brox and G.V.Mahesh, Paper presented at the EMIT’96 Conference, IISc, Bangalore, February 12-16, 1996, Proceedings pp 84-89.

26.  Some reliability aspects of SLC-MCM-L interconnection structures under thermoelastic loads, K.Arul Selvan and G.V.Mahesh, Paper presented at the EMIT 96 Conference, IISc, Bangalore, February 12-16, 1996, Proceedings pp 379-384.

27.  Advanced Packaging Technologies for High-Performance applications, G.V.Mahesh, Invited Lecture given during the CEP course on Avionics System Simulation and Optimisation organized by ADE, Bangalore, November 28, 1996.

28.  Design-Build-Operate (DBO)- a unique hands-on experience course at Georgia Tech., Rao R Tummala, Mahesh G Varadarajan, Vidya Krishnan and Don Estrich, Paper presented at the Annual NSF-ERC Conference organized by NSF and held at Washington DC, November 7-8, 1999.

29.  An Innovative Hands-on Complete Product Development Cycle, Rao Tummala and Mahesh Varadarajan, Proceedings of the EMIT-2000 International Conference held at the J N Tata Auditorium, Bangalore, February 21-24, 2000.

30.  Microelectronics Systems Packaging Education, Mahesh Varadarajan, Paper presented at the 3rd International Academic Conference, Atlanta, USA, March 8, 2000.

31.  A hands-on multi-disciplinary product development course for Microsystems Packaging Education, Swapan Bhattacharya, Joseph Hobbs, Orfi Sanchez, Venkatesh Sundaram, Rao Tummala, Gary May and Mahesh Varadarajan, Paper presented at the 51st Annual IEEE-ECTC Conference, Buena Vista, Florida, USA, May 2001, pp405-409.

32.  Microvias for high-density PWBs, Mahesh G. Varadarajan, Invited lecture at the National Conference on Electronics Design and Technology, October 12-13, 2001, CEDT-I, Mohali, India.

33.  Stencils for printing in Microelectronics; Prathiba Patil, S Vedavathi, Suman A Gupta, Deepa S, Mahesh G V and G Ananda Rao; Paper presented at the IMAPS India National Conference-2004, November 27-28, 2004, Bangalore.

34.  Adhesion of Copper to epoxy substrates in high density interconnections; Deepa S, Vedavathi, Suman Gupta, Prathiba Patil, Mahesh G V and G Ananda Rao; Paper presented at the IMAPS India National Conference-2004, November 27-28, 2004, Bangalore.

35.  A novel approach for etching high and ultra high density interconnections on organic substrates; Vedavathi S, Prathibha Patil, Suman Gupta, Deepa S, Mahesh G V and G Ananda Rao; Paper presented at the IMAPS India National Conference-2004, November 27-28, 2004, Bangalore.

36.  Electrochemical copper metallization for MCM-L applications; Suman Gupta, Vedavathi S, Deepa S, Prathiba Patil, Mahesh G V and G Ananda Rao; Paper presented at the IMAPS India National Conference-2004, November 27-28, 2004, Bangalore.

37.  Study on the use of photoimageable solder masks as inter-layer dielectrics for microvia boards using SBU technology; Mahesh G V, Karthik S, Nishad Patil, Suman Gupta, Deepa S, Vasanta K B, C Antonisamy and G Ananda Rao; Paper presented at the IMAPS India National Conference-2004, November 27-28, 2004, Bangalore.

38.  Development and implementation of a hands-on multi-disciplinary “Design, Build, Operate” course series";Leyla Conrad, Swapan Bhattacharya, Ravi Doraiswami, Mahesh Varadarajan, Gary May and Rao Tummala; Paper presented at the 8th UICEE Annual Conference on Engineering Education, Kingston, Jamaica, 7-11 February 2005,pp193-196.

39.  Reliability assessment of embedded passives on multilayered microvia organic substrates"; K. J. Lee, Swapan Bhattacharya, Mahesh Varadarajan, Lixi Wan, Isaac Robin Abothu, Venky Sundaram, Prathap Muthana, Devarajan Balaraman, P M Raj, Madhavan Swaminathan, Suresh Sitaraman, Rao Tummala; Puligandla Viswanadham and Steven Dunford (Nokia); John Lauffer (EI Technologies); Paper presented at the IEEE-CPMT International Symposium and Exhibition on Advanced Packaging Materials, Irvine, CA, March 16-18, 2005.

40.  International Collaboration in Packaging Education: Hands-on System-on-Package (SOP) graduate level courses - Indian Institute of Science and Georgia Tech PRC", Mahesh Varadarajan, G Ananda Rao, N Jaganmohan Rao, Swapan Bhattacharya, Ravi Doraiswami, Gary May, Leyla Conrad and Rao Tummala, Paper presented at the 55th annual ECTC Conference, Buena Vista, Florida, May 31-June 3, 2005.

41.  Frequency Limitations of Conventional Embedded Decoupling Capacitors in high-speed circuits and the need for nanaocapacitors", Wan Lixi. P Markondeya Raj, Devarajan Balaraman, Swapan Bhattacharya, Varadarajan Mahesh, Isaac Abothu, Natasha Mittal, Madhavan Swaminathan, Rao Tummala and David Collard, Paper presented at the 55th annual ECTC Conference, Buena Vista, Florida, May 31- June 3, 2005.

42.  SOP Embedded Thin Film Resistors on High and Low Loss Thick Film Dielectrics”; Swapan Bhattacharya, Mahesh Varadarajan, Premjeet Chahal, K J Lee, Ajanta Bhattacharjee, Rao Tummala, Suresh Sitaraman, John Papapolymerou, Manos Tentzeris; Paper (Code 73500) presented at the Asia-Pacific Rim InterPACK '05 Conference held at Westin St. Francis, San Francisco,CA, July 17-22, 2005.

43.  Reliability Assessment of Embedded Capacitors in Multilayered Microvia Organic Substrates; Kang J Lee, Raghuram Pucha, Mahesh Varadarajan, Swapan Bhattacharya, Rao Tummala, and Suresh Sitaraman Paper presented at the Annual IMAPS 2005 Conference and Exhibition, Philadelphia, PA, September 25-29, 2005,pp98-104. (Paper Session-TP1).

44.  Measurement, Modeling and characterization of embedded capacitors for Power Delivery in the mid-frequency range; Prathap Muthana, Ege Engin, Madhavan Swaminathan, Rao Tummala, Venkatesh Sundaram, Lixi Wan, S.K Bhattacharya, P.M. Raj, K J Lee, Mahesh Varadarajan, and Isaac Robin Abothu; Proceedings, IEEE International Sysmposium on electromagnetic compatibility, August 7-12, Chicago 2005, pp638-643.

45.  Design, Fabrication and Reliability Assessment of Embedded Resistors and Capacitors in a Multilayered Organic Substrate with Microvias;  Mahesh G Varadarajan, K.J. Lee, Swapan Bhattacharya, Raghuram Pucha, Rao Tummala, Suresh Sitaraman, Poster Paper presented at the IMAPS India National Conference-IINC 2005, 19-21 December 2005 at IIT Bombay.

46.  Design, Fabrication and Reliability Assessment of Embedded Resistors and Capacitors in a Multilayered Organic Substrate with Microvias;  Mahesh G Varadarajan, K.J. Lee, Swapan Bhattacharya, Raghuram Pucha, Rao Tummala, Suresh Sitaraman, Paper presented at the 4th Annual TECIT Conference of the Electrical Sciences Division of IISC, 24 February 2006, IISc.

47.  Embedded thin film resistors on BCB by electroless plating and direct foil lamination; Swapan K Bhattacharya, Mahesh Varadarajan, Seth Johnston, K J Lee, Suresh Sitaraman and Rao Tummala, Proceedings of the IEEE-CPMT International Symposium and Exhibition on Advanced Packaging Materials-Processes, Properties and Interfaces (APM-2006) Conference held at Georgia Tech Hotel and Conference Center, Atlanta, March 15-17, 2006, pp116.

48.  Recent Advances in Low CTE and High Density System-on-a-Package (SOP) Substrate with Thin Film Component Integration; Venky Sundaram, Rao Tummala, Boyd Wiedenman, Fuhan Liu, Raj Pulugurtha, Robin Abothu, Swapan Bhattacharya, Mahesh Varadarajan, Ed Bongio, Walt Sherwood; Proceedings of the 56th IEEE-CPMT ECTC Conference and Exhibition held in San Diego, California, May-June 2006, pp1375-1380.

 

 

49.  A novel electroless process for embedding thin film resistors on BCB; Swapan K Bhattacharya, Mahesh G Varadarajan, Premjeet Chahal, Gopal Jha and Rao R Tummala; Journal of Electronics Materials, Vol 36 No.3 (2007) 242-244.

50.  Studies on Design, Fabrication and Reliability Assessment of Embedded Passives on a High-Density Interconnect (HDI) Organic substrate using a sequential build-up process; Mahesh G Varadarajan, Kang J Lee, Swapan K Bhattacharya, Ajanta Bhattacharjee, Lixi Wan, Raghuram Pucha, Rao R Tummala and Suresh Sitaraman, Proceedings of the IEEE-CPMT HDP06 Conference on High Density Microsystem Design and Packaging and Component Failure Analysis, June 27-30, 2006, Shanghai,pp98-108.

51.  Printed Circuit Board (PCB) Miniaturization by Embedded Passives and Sequential Build-Up (SBU) Process Methodology; Mahesh G Varadarajan, Kang J. Lee, Swapan K Bhattacharya, Raghuram Pucha, Rao R Tummala, and Suresh Sitaraman; Journal of Indian Institute of Science, Vol.86 No.6 (Dec 2006) 639-654.

52.  Printed Wiring Board (PWB) Miniaturization by Embedded Passives and Sequential Build-Up (SBU) Process Methodology using Microvia Interconnects-Part I; P.S. Balakrishnan, K.B.Vasanta, A. Malini and G.V. Mahesh; Proceedings of the Conference on Advances in Space Science and Technology (CASST-07), Bangalore, January 29-31, 2007, pp355-361. (Also as Poster Exhibit).

53.  PWB Miniaturization by embedded passives and Sequential Build-up (SBU) Process Methodology using microvia interconnects-Part II; P.S Balakrishnan, P. Arockiasamy, C. Antonisamy, K.B.Vasanta and G V Mahesh; Proceedings of the 24th Annual In-house Symposium on Space Science and Technology,IISc, 30-31 January 2008; pp65-72.

 

 

Author in Book

1)  "Fundamentals of Microsystems Packaging"; Chapter 16: Fundamentals of system-level PWB technologies (authors: Mahesh Varadarajan, Zsolt Illyefalvi-Vitez, Joachim Zimmermann & Rao R Tummala); Ed. Rao R Tummala, McGraw Hill, NY, 2001, pp612-656.

a)  Managing Editor for the above book; managing 22 Chapters and over 45 authors worldwide integrating their contributions to the chapters.

 

 

 

CONTACT INFO

 

·         Phone: +91-80-2293 3093 (Direct)

·         Fax:   +91-80-2293 2290 (CEDT Office)

·         E-Mail: mahesh@cedt.iisc.ernet.in

 

 

CEDT Home || IISc Home

Page updated Jan 31, 2012